Lucent Technologies Window SLV 9124 Uživatelský manuál Strana 67

  • Stažení
  • Přidat do mých příruček
  • Tisk
  • Strana
    / 271
  • Tabulka s obsahem
  • ŘEŠENÍ PROBLÉMŮ
  • KNIHY
  • Hodnocené. / 5. Na základě hodnocení zákazníků
Zobrazit stránku 66
Configuration
3-38
9124-A2-LB20-00
March 2000
Table 3-7. Signaling and Trunk Conditioning Values (2 of 3)
Network Side DSX-1 SideMeaning
E&M-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an E&M interface (ABCD = 0000).
E&M idle
E&M-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an E&M interface (ABCD = 1111).
E&M busy
FXOg-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an FXO Ground-Start interface (ABCD = 1111).
FXSg-idle
FXOg-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an FXO Ground-Start interface (ABCD = 0101).
FXSg-busy
FXOl-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an FXO Loop-Start interface (ABCD = 0101).
FXSl-idle
FXOl-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an FXO Loop-Start interface (ABCD = 0101).
FXSl-busy
FXSg-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an FXS Ground-Start interface (ABCD = 0101).
FXOg-idle
FXSg-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an FXS Ground-Start interface (ABCD = 1111).
FXOg-busy
FXSl-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an FXS Loop-Start interface (ABCD = 0101).
FXOl-idle
FXSl-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an FXS Loop-Start interface (ABCD = 1111).
FXOl-busy
FXOD-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an FXODN interface (ABCD = 0000).
FXSD-idle
FXOD-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an FXODN interface (ABCD = 1111).
FXSD-busy
FXSD-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
an FXSDN interface (ABCD = 0000).
FXOD-idle
Zobrazit stránku 66
1 2 ... 62 63 64 65 66 67 68 69 70 71 72 ... 270 271

Komentáře k této Příručce

Žádné komentáře